Vanko, J., & Hudec, J. (1998). Verifikácia testov pre VLSI obvody a AFTG = Verifikation of tests for VLSI circuit with AFTG: Dipl.práca. STU v Bratislave FEI.
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Chicago Style (17th ed.) Citation
Vanko, Ján, and Ján Hudec. Verifikácia Testov Pre VLSI Obvody a AFTG = Verifikation of Tests for VLSI Circuit with AFTG: Dipl.práca. Bratislava: STU v Bratislave FEI, 1998.
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MLA (9th ed.) Citation
Vanko, Ján, and Ján Hudec. Verifikácia Testov Pre VLSI Obvody a AFTG = Verifikation of Tests for VLSI Circuit with AFTG: Dipl.práca. STU v Bratislave FEI, 1998.
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Warning: These citations may not always be 100% accurate.